Hello, I am using the UDOO Neo in my master's thesis and I want to use it to read sensor data from the M4's SPI interface and transmit it via Ethernet. I figured that the Neo is the perfect board due to the shared memory between the Linux host and the M4. I have been trying to get this working for two weeks now but I am stuck. A little help would be great! Currently I am able to read my sensor data from the M4 processor via SPI with no problem, but the Serial interface to the Linux side is very slow (100kb/sec or so). I have a C++ program running that receives the bytes from the serial interface so that the buffers should not get full. There are several options that would solve my problem, none of which I am able to get to work: 1. A faster ttyMCC to transmit my data. 2. Shared memory between the two processors (so I could use the ttyMCC to tell the Linux side that new data is available and read the data itself from the shared memory) 3. Disabling the M4 and accessing the SPI interface directly from the Linux side. I tried recompiling the kernel with new device tree files but I don't get the SPI device to show up. The forum thread that contains an approach is based on an older kernel version so the patch cannot be used anymore. Can someone help me? Is there anything I am missing? Thank you so much!
I'm a newbie in this, but I would go for the second option. Here, https://github.com/ektor5/udooneo-m4uploader/blob/master/mqx_upload_on_m4SoloX.c you have basic shared memory communication based on /dev/mem, where Linux on A9 processor loads firmware on M4 memory. In my Yocto (for udoneo-full-cmdline image) enviroment , file udooneo/kernel-source/arch/arm/boot/dts/imx6sx-udoo-neo-m4.dtsi , I see: /* Reserved 1Mb for MCC */ mcc_memory: m4@0xBFF00000 { no-map; reg = <0xBFF00000 0x00100000>; }; so maybe you can add a similar new memory section in your Linux DT for the M4 and use /dev/mem to read it from Linux. Also, this: https://www.nxp.com/docs/en/application-note/AN5317.pdf could help about how the A9<->M4 see the same address in his memory space.
Firstly it would be useful to know what data rate you expect the M4 to publish at, as this determines what is possible or not if you want to use the M4. If you want to share a block of memory between the 2 cores then this isn't a trivial task mainly because on the Linux side you need to the protect the memory region from Linux virtual memory allocation along with coordinating access with the M4 core, so most likely a kernel driver comes into play for access from user space. Your probably looking at around 400Kb/s as a realistic data rate between the cores for message passing. I would suggest starting with spi and ethernet on the A9 side and verifying if that gives you the performance you require. Depending on the Kernel you are using the spi driver may use DMA to help with throughput.
