Hi, In my 12 years' experience as a hardware engineer, usually microcontroller GPIO pins have input impedance of at least 1 Megaohm... but some work I'm doing with Neo right now seems to be hinting that it's quite a bit lower (when the pins are set to digital input of course). The spec sheet only seems to mention something called 'keeper circuit resistance' which is about 100k... That's not the way I've usually seen the spec described... and it also seems crazy low. Does anyone know what the input impedance for the Neo GPIO pins is supposed to be? Thanks!
Perhaps the schematics can give you some clue: https://udoo.org/download/files/UDOO_NEO/schematics/UDOO_NEO_schematics.pdf
Thanks, Walter. That might be helpful to know exactly which pingroup the GPIO numbers go to... but the spec itself comes from the IMX6SX IC. Usually the datasheets have a fairly straightforward spec like 'input impedance' for the GPIOs but I don't see that in the electrical datasheet. It's probably the Keeper Circuit spec which is only 100k at worst. Anyway experiments are pointing conclusively to the IMX6SX having low input impedance so we'll just have to deal with it. The sign of this is that your voltage signal output from a peripheral device is getting dragged low on it's way to the Neo. Usually digital output pins are supposed to have low output impedance (which helps prevent this issue), but sometimes you get a device that's not great (33k in my case) and if you're interfacing that to an IC with 100k input impedance - you'll see about 25% voltage drop. The weird thing is we're seeing even higher than that on some of the Neo pins. The way to deal with it (if anyone out there is stumped by this) is to use a unity gain voltage buffer in the middle. Thanks again for your help, Walter!
